Difference between revisions of "Fundamental Limits"
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|Previous chapter=Robust Performance | |Previous chapter=Robust Performance | ||
|Next chapter=Architecture and System Design | |Next chapter=Architecture and System Design | ||
| + | |First edition URL=None | ||
|Chapter summary=In this chapter we discuss properties that limit performance and robustness of control systems. Non-minimum phase dynamics, due to time delays and right half- plane poles and zeros impose severe limits. There are also nonlinear behaviors that appear at large and small signal levels. Large signal limits can be caused by limited rate and power of actuators, or by constraints required to protect the process. Small signal limits can be caused by measurement noise, friction, and quantization in converters. We also discuss consequences of the limits for loop shaping, and give rules for pole placement design. | |Chapter summary=In this chapter we discuss properties that limit performance and robustness of control systems. Non-minimum phase dynamics, due to time delays and right half- plane poles and zeros impose severe limits. There are also nonlinear behaviors that appear at large and small signal levels. Large signal limits can be caused by limited rate and power of actuators, or by constraints required to protect the process. Small signal limits can be caused by measurement noise, friction, and quantization in converters. We also discuss consequences of the limits for loop shaping, and give rules for pole placement design. | ||
|Chapter contents=# System Design Considerations | |Chapter contents=# System Design Considerations | ||
Revision as of 21:41, 28 August 2021
| Prev: Robust Performance | Chapter 14 - Fundamental Limits | Next: Architecture and System Design |
In this chapter we discuss properties that limit performance and robustness of control systems. Non-minimum phase dynamics, due to time delays and right half- plane poles and zeros impose severe limits. There are also nonlinear behaviors that appear at large and small signal levels. Large signal limits can be caused by limited rate and power of actuators, or by constraints required to protect the process. Small signal limits can be caused by measurement noise, friction, and quantization in converters. We also discuss consequences of the limits for loop shaping, and give rules for pole placement design.